The present invention relates to a semiconductor device and a method of producing the semiconductor device. In particular, the present invention relates to a semiconductor device, in which an MOS (Metal Oxide Semiconductor) transistor and a lateral bi-polar transistor are formed on a same SOI (Silicon On Insulator) substrate.
Conventionally, various types of lateral bi-polar transistors have been formed on SOI substrates (refer to Patent References 1 to 3).    Patent Reference 1: Japanese Patent Publication No. 05-21446    Patent Reference 2: Japanese Patent Publication No. 2002-26029    Patent Reference 3: Japanese Patent Publication No. 06-244365
For example, in Patent Reference 1, a base electrode formed of a doped poly-silicon is formed on a base area. Further, another base area is divided with a sidewall insulation layer.
In Patent Reference 2, electrodes formed of doped poly-silicon layers are formed on an emitter area, a base area, and a collector area, respectively.
Patent Reference 3 has disclosed a conventional semiconductor device and a conventional method of producing the conventional semiconductor device. In the conventional semiconductor device, an MOS (Metal Oxide Semiconductor) transistor and a lateral bi-polar transistor are formed on an SOI (Silicon On Insulator) substrate, thereby obtaining a so-called BiCMOS structure.
In the conventional semiconductor device disclosed in Patent Reference 3, a base area of the bi-polar transistor is divided with a sidewall formed of a silicon oxide layer. Further, according to the conventional method disclosed in Patent Reference 3, an impurity is diffused from a doped poly-silicon layer formed on an SOI layer, thereby forming a source/drain area of the MOS transistor.
In the conventional semiconductor devices disclosed in Patent References 1 and 2, the electrode formed of a doped poly-silicon is formed directly on the base area and the likes of the bi-polar transistor. Accordingly, an impurity may be diffused into the base area and the likes. As a result, an adverse effect may occur during an operation of the bi-polar transistor (bi-polar action).
Further, in the semiconductor devices disclosed in Patent References 1 and 3, the base area is divided with the sidewall. In general, the sidewall has a narrow width of about 0.1 to 0.15 μm. Accordingly, the base area tends to have a small (narrow) width (length), thereby lowering voltage resistance. When the width of the sidewall needs to change, it is necessary to indirectly adjust an etching condition in forming the sidewall, a material of the sidewall, a height of the gate electrode, and the likes. Accordingly, it is difficult to control and change the width of the sidewall significantly.
Further, when the width of the sidewall is changed at one portion, it is necessary to change the width of the sidewalls at all of portions on the SOI substrate. Accordingly, when the width of the sidewall of the bi-polar transistor with the BiCMOS structure is enlarged, the width of the sidewall of the MOS transistor is enlarged as well, thereby affecting an operation of the MOS transistor.
In the conventional method of producing the BiCMOS structure disclosed in Patent Reference 3, the MOS transistor is formed with a process different from that of producing an ordinary MOS transistor. Accordingly, when the method is applied to a mass production line, it is necessary to greatly tune the process of forming the ordinary MOS transistor. Especially, it is difficult to control the impurity to be diffused into the SOI layer through the doped poly-silicon layer. Accordingly, it is difficult to form a desired source/drain area.
In view of the problems described above, an object of the present invention is to provide a semiconductor device, in which it is possible to form an MOS resistor and a bi-polar transistor on a same SOI substrate, thereby obtaining a lateral bi-polar transistor with high voltage resistance.
Further, an object of the present invention is to provide a method of producing the semiconductor device, in which the MOS transistor and the bi-polar transistor are formed on the same SOI substrate, without significantly changing a method of producing an ordinary MOS transistor.
Further objects and advantages of the invention will be apparent from the following description of the invention.